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L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers’ mission and quest for professional growth. L3Harris provides an inclusive, engaging environment designed to empower employees and promote work-life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do.

L3Harris is the Trusted Disruptor in defense tech. With customers’ mission-critical needs always in mind, our employees deliver end-to-end technology solutions connecting the space, air, land, sea and cyber domains in the interest of national security.

Job Title: Senior Associate, Integration/Test Engineer, Flying Probe/JTAG

Job Code: 46024

Job Location: Alpharetta, GA

Job Schedule: 9/80: Employees work 9 out of every 14 days- totaling 80 hours worked- and have every other Friday off

Job Description:

We are seeking a Senior Associate, Integration & Test Engineering to develop, sustain, and improve PCB assembly test solutions using SPEA flying-probe systems and JTAG Technologies boundary-scan tools. The engineer will develop and validate production test programs, improve fault coverage and diagnostic resolution, reduce test and debug time, and support manufacturing through troubleshooting and continuous improvement.

This role will also provide Design-for-Test guidance during schematic and PCB-layout development. The successful candidate will work closely with Electrical Engineering, Manufacturing, Quality, and NPI teams to ensure new designs are testable, manufacturable, and ready for reliable production.

Essential Functions:

• Develop, debug, validate, release, and maintain SPEA flying-probe test programs for production PCB assemblies.
• Develop, debug, validate, release, and maintain JTAG Technologies boundary-scan applications using ProVision and related tools.
• Provide Design-for-Test guidance for new electrical board designs.
• Participate in schematic and PCB-layout reviews to identify and resolve testability issues, including:
• JTAG architecture
• Flying-probe accessibility
• Test-point strategy
• Programming access
• Boundary-scan implementation
• Diagnostic and coverage requirements
• Use Mentor/Siemens EDA and Cadence tools to review schematics, PCB layouts, connectivity, component data, and design-rule information.
• Analyze and improve flying-probe and boundary-scan fault coverage, test time, repeatability, diagnostic resolution, and production effectiveness.
• Establish and maintain PCB Design-for-Test standards, design rules, review checklists, and measurable test-coverage requirements.
• Correlate ECAD design data with test coverage to identify untested nets, devices, interfaces, and defect modes.
• Support production troubleshooting, failure analysis, corrective actions, test-system sustainment, and manufacturing-escape investigations.
• Analyze test results, yield data, recurring defects, and production trends to identify opportunities for improvement.
• Support configuration control, change implementation, documentation, and release of test programs and related engineering artifacts.
• Collaborate with engineering and manufacturing teams during design reviews, prototype builds, new product introduction, and production transitions.
• Develop and maintain technical documentation, test instructions, troubleshooting guides, and process-improvement records.
• Use company-approved AI-assisted engineering and data-analysis tools to support test development, coverage analysis, failure triage, documentation, and workflow automation.
• Independently review and validate all AI-generated code, recommendations, and analyses before use in production or released hardware. Proprietary, sensitive, and export-controlled information must be handled only through approved company systems.

Qualifications:

• Bachelor’s degree in electrical engineering, computer engineering, electronics engineering, manufacturing engineering, or a related discipline, plus at least two years of relevant experience; or an equivalent combination of education, military technical training, and related experience.
• Experience with electronic test systems, diagnostics, troubleshooting, and production support.
• Experience developing, maintaining, or supporting one or more of the following: Flying-probe test systems, Boundary-scan/JTAG systems, Bed-of-nails or in-circuit test systems, Automated PCB assembly test equipment
• Experience interpreting electrical schematics, PCB layouts, component data, and connectivity information.
• Experience with industry-standard electronic test equipment, commercial off-the-shelf hardware, and Windows- or Linux-based applications.

Preferred Additional Skills:

• Experience supporting electronic test systems in aerospace, defense, or military electronics manufacturing.
• Experience with SPEA 4060- or 4080-series flying-probe systems and SPEA Leonardo development tools.
• Experience with JTAG Technologies ProVision, including:
  • Interconnect testing
  • Infrastructure testing
  • Memory testing
  • Logic-cluster testing
  • Device programming
• Experience with Mentor/Siemens EDA tools, such as Xpedition, PADS, Designer/DxDesigner, Expedition PCB, or HyperLynx.
• Experience with Cadence tools, such as OrCAD Capture, Allegro PCB Designer, System Capture, or Allegro Constraint Manager.
• Experience developing PCB Design-for-Test standards, automated design checks, testability rules, or coverage-analysis processes.
• Experience testing high-density assemblies containing BGAs, FPGAs, processors, DDR memory, Flash memory, programmable logic, and high-speed interfaces.
• Experience correlating ECAD design data with flying-probe and boundary-scan coverage results.
• Experience with Python for test-data processing, coverage reporting, engineering automation, or test-program support.
• Experience with Git and Bitbucket-based software development workflows.
• Experience using AI-assisted tools, machine learning, large language models, or AI agents for failure analysis, anomaly detection, test-result analysis, troubleshooting, documentation, or manufacturing-test optimization.
• Experience establishing controlled workflows for the review and validation of AI-generated test code or engineering recommendations.

L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law.

Please be aware many of our positions require the ability to obtain a security clearance. Security clearances may only be granted to U.S. citizens. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information.

By submitting your resume for this position, you understand and agree that L3Harris Technologies may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions.

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